In this paper chain-based power-aware test compression technique is proposed, with low area overhead. Previous test compression techniques cause extreme power consumption in addition to area panalty. For test compression techniques, not only the compression ratio is important but also the power reduction, because the power consumption in test mode is critical to guarantee the reliability of the product. Proposed chain-based power-aware test compression technique reduces test power consumption significantly by reducing transitions in test vectors by exploiting don"t care bits. It also maintains test compression ratio, similar to previous techniques.