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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2013.11
- 수록면
- 208 - 212 (5page)
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초록· 키워드
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The heterogeneous multiprocessor architecture is more energy-efficient than homogeneous multiprocessor architecture. It can be possible, however, when the operating system schedules tasks to appropriate processors based on their architectural properties. In mobile world, ARM revealed their big.LITTLE architecture to satisfy two conflicting requirements: the powerful performance and the energy-efficient processing. Heterogeneous Multi Processing for big.LITTLE processor works by assigning each task by its nature. If a task consumes proportionally high CPU resource rather than others, then HMP scheduler assigns this task to big core, and in opposite case, HMP scheduler assigns to LITTLE core. By observing each task during runtime, if a task’s characteristic is changed, HMP scheduler will move the task to the opposite core. Some power saving techniques like, DVFS (Dynamic Voltage & Frequency Scaling), Dynamic hot plug, change the performance of system to fit in current required performance level. So, the CPU frequency and the number of online cores can be changed during runtime. If HMP scheduler assigns a task to big core without this power information which is changed by these power saving techniques, HMP scheduler would use big core involuntary.
In this paper, we evaluate a power-aware task scheduling for the big.LITTLE mobile processor and demonstrate power awareness in task scheduler consumes less power still staying on same performance in mobile processor. And we list up some possible power information that can improve HPM scheduler for further works.
In this paper, we evaluate a power-aware task scheduling for the big.LITTLE mobile processor and demonstrate power awareness in task scheduler consumes less power still staying on same performance in mobile processor. And we list up some possible power information that can improve HPM scheduler for further works.
목차
Abstract
Introduction
Task Scheduler for big.LITTLE MP in Linux
DVFS Technique for Power Saving
Power Efficiency Evaluation
Conclusion
References
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